1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device, and more particularly, to a method of fabricating a semiconductor device through using a photoresist structure suitable for sub-micron pattern transfers in semiconductor processes.
2. Description of the Prior Art
Generally, integrated circuit production relies on the use of photolithographic processes and etching processes to define various electrical elements and interconnecting structures on microelectronic devices. With the coming of a generation of Ultra Large Scale Integrated (ULSI) Circuits, the integration of semiconductor devices has gotten larger and larger. G-line (436 nm) and I-line (365 nm) wave-lengths of light have been widely used in photolithography processes. However, in order to achieve smaller dimensions of resolution, wavelengths of light used for photolithography processes have been reduced into deep UV regions of 248 nm and 193 nm. Nevertheless, the shorter the wavelengths of light are, the thinner the photoresist layers are. The thin photoresist layers might not be thick enough for blocking the etching processes in the following fabrication. As a result, for a photolithography process utilizing short wavelengths of light, it is necessary to look for a photoresist structure suitable for lithography processes and etching processes.
Please refer to FIG. 1. FIG. 1 is a schematic diagram of a prior art photoresist structure. As shown in FIG. 1, a semi-conductor wafer 10 comprises a substrate 12, an anti-reflection layer 14, and a photoresist layer 16. Because wavelengths of light used for exposure processes are related to the depth of focus (DOF), a required thickness of the photoresist layer 16 depends on the wavelengths of light. Accordingly, the thickness of the photoresist layer 16 has to be thin enough so that the molecules in the surface of the photoresist layer have approximately the same focus as the molecules in the bottom of the photoresist layer. However, the photoresist layer 16 is used to be a hard mask on the substrate 12 in the following etching processes. For this reason, the thin photoresist layers might not be thick enough for blocking the following etching processes.
Please refer to FIG. 2. FIG. 2 is a schematic diagram of another prior art photoresist structure used to overcome the above-mentioned problem. As shown in FIG. 2, a semicon-ductor wafer 20 comprises a substrate 22, a silicon oxynitride layer 24, an anti-reflection layer 26, and a photoresist layer 28. Therein the silicon oxynitride layer 24 serves as a hard mask so that the photoresist layer 28 together with the silicon oxynitride layer 24 can block the etching processes in the following fabrication. After the predetermined pattern of the mask is transferred onto the substrate 22, the silicon oxynitride layer 24, the anti-reflection layer 26, and the photoresist layer 28 are removed. However, the silicon nitride layer 24 is not easy to etch away. Thus, the process of removing the silicon nitride layer 24 usually causes damage to the surface of the substrate 22.
In addition, methods used to overcome the above-mentioned problem further include bilayer photoresist technology (U.S. Pat. No. 6,323,287) and top surface image (TSI) technology (U.S. Pat. No. 6,296,989). However, both of the two methods require new photoresist materials. For example, the photoresist layer used in the TSI technology comprises silicon-containing materials. Providing new photoresist materials will increase production costs and increase complexity and difficulty of processes. As a result, it is necessary to look for a photoresist structure suitable for sub-micron pattern transfers in photolithography processes and etching processes.